#define DR_REG_RTCIO_BASE 0x3ff48400

#define RTC_IO_TOUCH_PAD0_REG (DR_REG_RTCIO_BASE + 0x94)

#define RTC_IO_TOUCH_PAD0_MUX_SEL_M (BIT(19))

#define RTC_IO_TOUCH_PAD0_FUN_IE_M (BIT(13))

#define RTC_GPIO_IN_REG (DR_REG_RTCIO_BASE + 0x24)

#define RTC_GPIO_IN_NEXT_S 14

.set channel, 10
state: .long 0

entry:
WRITE_RTC_REG(RTC_IO_TOUCH_PAD0_REG, RTC_IO_TOUCH_PAD0_MUX_SEL_M, 1, 1)
WRITE_RTC_REG(RTC_IO_TOUCH_PAD0_REG, RTC_IO_TOUCH_PAD0_FUN_IE_M, 1, 1)
READ_RTC_REG(RTC_GPIO_IN_REG, RTC_GPIO_IN_NEXT_S + channel, 1)


move r3, state
st r0, r3, 0

halt
